The present invention relates to microelectronic assemblies and to components and methods used for making the same.
Microelectronic elements such as semiconductor chips ordinarily are mounted on circuit panels such as circuit boards. For example, a packaged semiconductor chip may have an array of bonding contacts on a bottom surface of the package. Such a package can be mounted to a corresponding array of bonding contacts exposed at a top surface of a circuit board by placing the package on the circuit board with the bottom surface of the package facing downwardly and confronting the top surface of the circuit board, so that each bonding contact on the package is aligned with a corresponding bonding contact on the circuit board. Masses of a conductive bonding material, typically in the form of solder balls, are provided between the bonding contacts of the package and the bonding contacts of the circuit board. In typical surface-mounting techniques, solder balls are placed on the bonding contacts of the package before the package is applied to the circuit board.
Ordinarily, numerous microelectronic elements are mounted side-by-side on the circuit board and interconnected to one another by electrically conductive traces connecting the various bonding contacts. Using this conventional approach, however, the circuit board must have an area at least equal to the aggregate area of all of the microelectronic elements. Moreover, the circuit board must have all of the traces needed to make all of the interconnections between microelectronic elements. In some cases, the circuit board must include many layers of traces to accommodate the required interconnections. This materially increases the cost of the circuit board. Typically, each layer extends throughout the entire area of the circuit board. Stated another way, the number of layers in the entire circuit board is determined by the number of layers required in the area of the circuit board having the most complex, densely packed interconnections. For example, if a particular circuit requires six layers of traces in one small region but only requires four layers in the remainder of the circuit board, the entire circuit board must be fabricated as a six-layer structure.
These difficulties can be alleviated to some degree by connecting related microelectronic elements to one another using an additional circuit panel so as to form a sub-circuit or module which, in turn, is mounted to the main circuit board. The main circuit board need not include the interconnections made by the circuit panel of the module. It is possible to make such a module in a xe2x80x9cstackedxe2x80x9d configuration, so that some of the chips or other microelectronic elements in the module are disposed on top of other chips or microelectronic elements in the same module. Thus, the module as a whole can be mounted in an area of the main circuit board less than the aggregate area of the individual microelectronic elements in the module. However, the additional circuit panel and the additional layer of interconnections between this circuit panel and the main circuit board consume additional space. In particular, the additional circuit panel and additional layer of interconnections between the additional circuit panel and the main circuit panel add to the height of the module, i.e., the distance by which the module projects above the top surface of the main circuit board. This is particularly significant where the module is provided in a stacked configuration and where low height is essential, as, for example, in assemblies intended for use in miniaturized cellular telephones and other devices to be worn or carried by the user. Such a module may also require a complicated socket or connector between the module circuit panel and the circuit board.
The additional space consumed by mounting prepackaged semiconductor chips on a separate module circuit panel can be saved by integrating the circuit panel of the module with a part of the package itself, commonly referred to as a package substrate. For example, several bare or unpackaged semiconductor chips can be connected to a common substrate during the chip packaging operation. Packages of this nature can also be made in a stacked arrangement. Such multi-chip packages can include some or all of the interconnections among the various chips in the package and can provide a very compact assembly. The main circuit board can be simpler than that which would be required to mount individual packaged chips in the same circuit. However, this approach requires unique packages for each combination of chips to be included in the package. For example, in the cellular telephone industry, it is a common practice to use the same field programmable gate array (xe2x80x9cFPGAxe2x80x9d) or application specific integrated circuit (xe2x80x9cASICxe2x80x9d) with different combinations of static random access memory (xe2x80x9cSRAMxe2x80x9d) and flash memory so as to provide different features in different cellular telephones. This increases the costs associated with producing, handling and stocking the various packages.
One aspect of the invention provides a circuit panel assembly which includes a circuit panel such as a printed circuit board having a top surface and a first microelectronic element disposed on the circuit panel, the first microelectronic element having a bottom surface overlying the top surface of said circuit panel and defining a gap therebetween. The assembly according to this aspect of the invention also includes an adaptor having a substrate including a first region. The substrate has oppositely-directed inner and outer surfaces in said first region. The first region of the substrate first extends at least partially in the gap between said bottom surface of said first microelectronic element and said top surface of said circuit panel with said inner surface facing upwardly toward the bottom surface of the first microelectronic element. The adaptor also includes a functional element as, for example, an array of terminals for connection to a further element disposed on the substrate outside of the first region. For example, the functional element of the adaptor may be disposed in an additional region which may be folded over the top of the first microelectronic element. Where the functional element includes terminals, one or more further microelectronic elements can be disposed above the first microelectronic element and connected to the terminals, to provide a stacked arrangement. In other variants, the additional region may project laterally away from the first microelectronic element.
The adaptor may have apertures in the first region, and socket contacts aligned with at least some of these apertures. Connection elements such as solder balls or surface-mountable leads on the first microelectronic element may extend through the apertures, and at least some of the connection elements may contact the socket contacts of the adaptor.
The assembly can be made using the techniques normally used to handle and secure packaged chips as, for example, placement, soldering and reflow; there is no need to prepare special stacked chip subassemblies in a chip packaging plant. Nonetheless, the preferred embodiments of the assembly can provide the benefits normally achieved by prepackaged stacked chip assemblies, such as compactness and simplified wiring layouts in the circuit board. In this arrangement, the functional element of the adaptor is connected to the first microelectronic element, to the contact pads of the circuit board, or both, by the socket contacts of the adaptor. However, because the connection elements extend through the adaptor to the circuit board, the presence of the adaptor need not substantially increase the height of the first microelectronic element above the circuit board.
In another arrangement, the adaptor has conductive attachments in the first region as, for example, pads overlying apertures in the adaptor substrate rather than the socket contacts discussed above. The functional element is electrically connected to at least some of these conductive attachments. The first microelectronic element is connected to the conductive attachments by internal connection elements such as thin solder lands, whereas mounting elements as, for example, solder balls, extend between said first conductive attachments and said contact pads. In this arrangement as well, the mounting and connection elements most preferably are arranged to minimize the height of the first microelectronic element above the circuit board. Most preferably, the bottom surface of the first microelectronic element is disposed at a height above the top surface of said circuit panel less than the sum of the height of the internal connection elements, the height of the mounting elements and the thickness of first connection region of the adaptor. For example, the mounting elements may extend at least partially within apertures within the adaptor, so that the height of the mounting elements is at least partially concealed within the thickness of the adaptor substrate. Here again, the assembly can be made using techniques similar to those used in mounting packaged chips to a circuit board as, for example, surface mounting techniques, so that there is no need for special prepackaged stacked chip assemblies.
Further aspects of the invention provide adaptors suitable for use in the aforementioned assemblies and assembly methods.